ILI9341 VCOM settings and impedance issue

[Poofjunior]

Hi everyone,

I'm writing my own driver for the ILI9341 2.8 TFT Display. Much of my work is inspired from your drivers and the datasheet, but I'm implementing it on the DE0 Nano FPGA.

I've duplicated the initialization sequence over a parallel interface, complete with the correct D/C, CS, and WE signals, but I haven't been able to get the screen to display anything, and I suspect that the issue is with my logic levels for input to the display. Here's my setup:

2.8" TFT Display VIN connected to 5[V] power supply.
8 pins from DE0 Nano (3.3 [V] logic-level FPGA) connected to the D0-D7 on the 2.8" TFT Display.

I don't have an oscilloscope handy, but I do have a logic analyzer. When the screen is turned off, the logic analyzer reads the output waveforms on the parallel bus perfectly. When the screen is powered up, the logic analyzer reads no data (all 0s) on the parallel bus. This behavior makes me think that having the screen on actually interferes with the data sent along the parallel bus... or it could be an impedance issue from the logic analyzer.

The logic analyzer is set to trigger at 3.3[V]. Setting it to trigger at 2.5[V] does show data on the bus, but that data doesn't remain "logic 1" for the appropriate length of time.

I might be able to fix this issue by changing the VCOM settings, but I don't understand their meaning from the datasheet. (I also know that there are logic-level converters on the 2.8" TFT Display, so I'm assuming that I should be able to use the same VCOM settings used in the Arduino example.)

Thanks for reading, and I'd appreciate any thoughts!

[Poofjunior]

Ah, my bad. I forgot to pull the RD pin HIGH. (I was tying it LOW instead.) The Logic-Level converters were shifting the pins to outputs rather than inputs.

Thanks for posting the schematic! (That would've been tricky to see otherwise)