I believe Zener is exactly right.
In addition, I'll gently suggest that things will be easier for you if you learn and follow the standard schematic conventions. Ground at bottom, V+ at top, input to the left, output to the right. There may occasionally be good reasons to violate these conventions, but those will be the rare exceptions to the common rule. For a single-transistor used as a switch, I can't think of a reason to violate the convention.
Just as one convenient source of an example, let's look at the 2N3904 data sheet: http://www.fairchildsemi.com/ds/MM/MMBT3904.pdf
Your circuit will look like Figure 1, the Delay and Rise Time equivalent test circuit, except without the capacitor C1. Your high rail voltage will be 12V instead of 3.0V. Your LEDs and current limiting resistor will go in place of the 275 ohm load in the sample circuit. You may use a different size base resistor.
But my point is mainly around the layout of the schematic, not the values of various components. If you look for almost any schematic of an NPN transistor used to switch a large load, it's drawn more-or-less that way. If you had used that convention, and compared your circuit to a sample switching circuit, the difference would have been easier to spot, I believe.