The propeller is a great chip and the IDE for it is well done. The language is not hard to learn but the chip itself requires a little advanced understanding to make the most of. Having 8 cores to divide among tasks is fantastic but learning to synchronize these in software is, frankly, more complicated than writing an interrupt handler. With power comes responsibility.
Spin is also a little slow due to being interpreted. The perf critical stuff really needs to be done in assembly which is way faster but yet another challenge- but fun. There's a great debugger for pasm from the community.
As for the Spartan6, I am actually doing some eval work with it at work using Labview, but U wanted to learn how to use it "raw" with Verilog for hobbyist fun. We didn't have these when I was in school and I saw it as an opportunity to update my skills. In the last couple weeks I've taught myself a fair amount of Verilog entirely from online articles and the coding examples in the Xilinx ISE.
As of last night I have the fpga successfully driving the 16x32 from an RGB frame buffer.
The max clock rate the panel seems to accept is surprisingly low though. Above about 8mhz, the panel no longer seems to respond. I need to put a scope on it and see whether maybe the inputs need some termination or perhaps 3.3-5v level shifters. The input looks like a Chinese hc545 latch and it may not be happy with the 3.3v fpga outputs.