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Andrewsi wrote:As of last night I have the fpga successfully driving the 16x32 from an RGB frame buffer.
The max clock rate the panel seems to accept is surprisingly low though. Above about 8mhz, the panel no longer seems to respond. I need to put a scope on it and see whether maybe the inputs need some termination or perhaps 3.3-5v level shifters. The input looks like a Chinese hc545 latch and it may not be happy with the 3.3v fpga outputs.
lbu $t3,0($a0)
sh $t4,LATDCLR // CLK HIGH
sb $t3,LATE
nop
sh $t4,LATDSET // CLK LOW
lbu $t3,1($a0)
sh $t4,LATDCLR // CLK HIGH
sb $t3,LATE
nop
sh $t4,LATDSET // CLK LOW
... and so on
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