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This does not make sense... errors on schematic?
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This does not make sense... errors on schematic?

by predatorcoder on Mon Jun 09, 2008 5:54 am

I'm looking at building my own board / sourcing my own parts. Noticing a few things that stand out...

VDD on this board is 3.3V.

1. PNA4602M datasheet specifies operating voltage of 5V. Isn't this a problem? I chose RPM5338-H14 for my design, but this looks like a problem with the original kit...

2. How does the tricolor LED work? E.g. blue and green have forward voltages of 3.5V to 4.0V. That is way more than 3.3V - wouldn't they not light up because of this? It seems like we need a separate regulator and/or LED driver for the green and the blue.

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Re: This does not make sense... errors on schematic?

by adafruit on Mon Jun 09, 2008 10:53 am

PredatorCoder wrote:I'm looking at building my own board / sourcing my own parts. Noticing a few things that stand out...

VDD on this board is 3.3V.

1. PNA4602M datasheet specifies operating voltage of 5V. Isn't this a problem? I chose RPM5338-H14 for my design, but this looks like a problem with the original kit...


nope, it works just fine. we will probably change the IR receiver but there was no time before v1.1 went out to find a nice pin-compatible one

2. How does the tricolor LED work? E.g. blue and green have forward voltages of 3.5V to 4.0V. That is way more than 3.3V - wouldn't they not light up because of this? It seems like we need a separate regulator and/or LED driver for the green and the blue.


The full-drive Vf's are ~3.4V
but we're not full-driving them as they are indicators
they work just fine

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by predatorcoder on Mon Jun 09, 2008 12:37 pm

I'm pretty sure this is an error in the schematic... Pin 8 of the ethernet connector should be connected to the GND net and not the VSS net in order to achieve the isolation required. The Pulse datasheet calls this "chassis ground" and figure 2-4 in the ENC28J60 datasheet shows it going to a different ground net, presumably chassis ground. What's a isolation transformer for if you just bypass it? ;)

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by adafruit on Mon Jun 09, 2008 1:14 pm

ah yes with the '65 there is a tie to pin8. dont worry, theres a HV cap in there so its not connected directly to ground. we'll put it in the next rev

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by darco on Mon Jun 09, 2008 5:52 pm

I can testify that the RGB LED that comes with the kit works remarkably well, somehow. The white-point is surprisingly well balanced out of the box.

I've tried a variety of different types of RGB LEDs with various board revisions. I've had a few types that were "pink" due to the issues you described, the the one in the kit works great. I've built in a mechanism for tuning the whitepoint of the LED. Let me know if you'd like to know how to do this.

On the J00-0065, pin 8 has a HV cap, so the center taps are not directly connected to logic ground. I don't personally think this is a problem. The issue of proper grounding was discussed in an earlier Parallax forum thread.

EDIT:

I just looked at the datasheet more closely, and the following note is below the schematic for the J00-0065:
Code: Select all | TOGGLE FULL SIZE
NOTE: Connect CHS GND to PCB ground.
.

Also, under the schematic for the J00-0045:
Code: Select all | TOGGLE FULL SIZE
Connecting pin 8 to Gound makes J00-0045 footprint compatible to J00-0065.


I do not think this was an error in the schematic.
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by predatorcoder on Tue Jun 10, 2008 12:45 am

OK I think we both may be wrong... sort of... this is still new to me...

I did some digging around. Take a look at IEEE 802.3 specification, sections 14.7.2.2 and the beginning of 14.3. Everything seems to be referenced to chassis ground there...

Now, Pulse datasheet says connect pin 8 to chassis ground. Also, Microchip datasheet does the same thing. Also, Micrel sample design does the same thing with the pulse-jack. Micrel makes lots of complicated PHYs so I assume they know what they're doing. So the question is, how does chassis ground and signal ground relate? Well they can be completely separated, or you can put a 1nF / 2kV cap between chassis ground and signal ground for ESD protection.

A resource I discovered that is very enlightening on this topic is the KSZ8041NL design kit. http://www.micrel.com/_PDF/Ethernet/ethernet_designkit/8041NL/KSZ8041NL_v1.4_DP.zip. Some notes on this design kit:

* Read the entirety of AN-111 application note "General PCB Design and Layout Guidelines". I think they probably know what they're doing after reading it... very worth reading.
* As an implementation example, look at KSZ8041NL Eval Board rev1.1.pdf schematic. Pulse jack pin 8 and pulse jack shield are connected to chassis ground. Chassis ground is connected to signal ground via 1nF/2kV cap. Also observe the note for that cap: "Place signal ground return of C14 close to signal ground at 5V input power to board." I suspect this is to keep the return of the ESD pulse (or anything else) away from the circuit. Obviously the MII side of the schematic is irrelavent but the physical side of it is enlightening as it's almost identical to a Microchip implementation (or any other PHY implementation).
* The socket board schematic provides another example of a simple RJ45 jack with discrete magnetics and termination resistors/cap tied to chassis ground.
* The photographs in the user's guide clearly show separate chassis/signal ground planes with an external cap between the two. Look at the smaller socket board in the photograph - it's smaller and easy to understand. The cap is a 1nF/2kV ceramic, radial lead, Y5P.
* KS8001 eval kit shows an example of USB connector. The USB connector shell is connected to ground via a 0.1uF cap. Same principle I guess.

OK I learned a lot today... This is the sort of thing that I think these companies just assume you know how to do. For my design I'm going to tie pin 8 to chassis ground and then connect chassis ground to signal ground with a cap, just like Micrel did. Sometime I should think about going to bed... haha

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by predatorcoder on Tue Jun 10, 2008 1:29 am

Of course I'm not going to bed...

Try googling for: shield capacitor 2kv (which appears to be used mainly for ESD protection, so the transient has a path to ground)

This is good: look at page 5 especially (well 6 too... well I skimmed the whole document): http://www.micrel.com/_PDF/Ethernet/app ... an-139.pdf

Here's another example that uses 1M resistor in parallel with 0.01uF cap between chassis ground and signal ground (rated for >= 2kV). http://www.asix.com.tw/FrootAttach/Layout/AX110xx_Layout_Guide_v13.pdf http://www.asix.com.tw/FrootAttach/Layout/AX88796_Layout_Guide_v11.pdf

Example from AMD (PCI network card): http://www.amd.com/us-en/assets/content_type/DownloadableAssets/schempci.pdf See page 3

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by predatorcoder on Tue Jun 10, 2008 2:35 am

Pin 5 (pin 1 on QFN) of the ENC28J60 is reserved output pin, not "WOL." The datasheet says it should be left disconnected (it is "no connect" pin).

I don't know why the symbol designer put a WOL pin in there... wake-on-LAN functionality is achieved via the general interrupt pin.

This would also free up an IO pin on the design. The connection currently makes that IO pin unusable, unless the trace to ENC28J60 pin 5 is cut.

Certainly the PCB has been proven to work. Since the pin is an output pin, if the Parallax chip does not drive it, and assuming this is a digital pin, there is no problem.

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by darco on Tue Jun 10, 2008 2:23 pm

Excellent observations!

I'll remove the pin 5 connection from the board ENC28J60. Good catch. Will add it to the errata.

I figured pin 8 was to be connected to VSS because it already had the HV cap. If the HV cap was not there then I would have connected it to the GND plane instead. I just don't know why they didn't just directly connect it to the shielding on the connector if that was their intent... But you are correct, the ENC28J60 datasheet does indeed specify that it should be connected to the chassis ground. The board will be updated in the future.

The issue of proper ESD protection was not exactly obvious to me, which I guess is what separates real EEs from posers like me. :)
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by predatorcoder on Tue Jun 10, 2008 6:37 pm

Don't worry too much... Relentless Googling reveals much. Then Google some more.

I'm looking forward to building the design. I redid the schematic with SMT parts, now I just have to lay out the PCB.

Do you know what LCD TV LadyAda uses in the pictures? I saw in one of the Flickr notes that it is really cheap, so I'd love to know.

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by ex-h0trod on Tue Jun 10, 2008 6:48 pm

PredatorCoder wrote:Don't worry too much... Relentless Googling reveals much. Then Google some more.

I'm looking forward to building the design. I redid the schematic with SMT parts, now I just have to lay out the PCB.

Do you know what LCD TV LadyAda uses in the pictures? I saw in one of the Flickr notes that it is really cheap, so I'd love to know.


looks to me like one of the old playstation one lcd's that was made to mount on top of the console and flip open like a laptop screen.
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