Microchip's SAM-D5x/E5x Family Datasheet says in 37. QSPI - Quad Serial Peripheral Interface:
"The QSPI allows the system to execute code directly from a serial Flash memory (XIP) without code
shadowing to SRAM. The serial Flash memory mapping is seen in the system as other memories (ROM,
SRAM, DRAM, embedded Flash memories, etc.,)."
Can the QSPI flash on the Metro M4 be read in the processor address space like any other flash memory? If so, to what address range is it mapped?