An update on the project this post is about. I implemented triggering by interrupting on ADC conversion complete and discovered that this slows things down dramatically. The interrupt reads where the DMA is writing to the buffer, checks to see if that is greater than a threshold and checks to see if this sample is greater or less than the previous sample. The interrupt also checks to see if it has already trigger and returns without checking anything avoiding retriggering. This works great and is fast as long as I hard code a specific channel to check and trigger edge (rising/falling), as soon as it has to check that as well as actually looking for a trigger I drop to less than 10 FPS.
I have looked into locking the interrupt in the cache however I cannot find any clear examples and this document from microchip makes no since.https://ww1.microchip.com/downloads/en/ ... 03186A.pdf
I then decided to move on from that approach and am now researching using the analog comparators to detect the trigger level. I really like this approach as not only does it eliminate lots of CPU overhead but it will allow me to utilize more built-in functionality of the MCU. I also like this approach most if not all high end oscilloscope triggering circuits are built around comparators. More advanced analog triggering should also be able to be implemented with the analog comparators as well, such as window triggering.
I'm not sure how useful more advanced triggering, such as protocol triggering, would be, considering that the protocol would need to be using a relatively slow baud rate. I plan on using ~8-16 or more GPIO to implement digital only channels after I get all the analog triggering worked out. I am planning on using digital potentiometers and op-amps to implement voltage dividers and amplifiers allowing for not only really small signals to be amplified to the 3.3V scale but for larger signals (say ~30-40) to be attenuated to the 3.3V scale as well. I have some 256 tap digital potentiometers and some op-amps that have 1.5V/uS output slew rate and and a bandwidth of nearly 6MHz yielding an effective output bandwidth of ~500-600kHz.
I think the protocol triggering would be more intuitive with GPIO as the input with BJT buffers to get around the 3.3V max voltage of the pins on the SAMD51. I currently have 40 some odd unused GPIO and the analog setup mentioned before should not use more than 10 or so GPIO.
Grand Central Oscilloscope adc help
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Re: Grand Central Oscilloscope adc help
Yep. "Let them eat lead" is my motto ;)
As I get older I find my hands aren't as steady as they once were. Plenty steady for soldering headers, but SMDs are a challenge. I have some QSPI memory chips I want to solder on a Teensy 4.1, so I need to figure out a way to do it.
I'll try my hot air station when time permits and see how that works. And I do have "gotta clean" flux on hand too, so I can try that.
As I get older I find my hands aren't as steady as they once were. Plenty steady for soldering headers, but SMDs are a challenge. I have some QSPI memory chips I want to solder on a Teensy 4.1, so I need to figure out a way to do it.
I'll try my hot air station when time permits and see how that works. And I do have "gotta clean" flux on hand too, so I can try that.
Please be positive and constructive with your questions and comments.