Multiple INA219 issue

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redmond
 
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Multiple INA219 issue

Post by redmond »

I am an embedded systems engineer. Hardware and software C and C++.
Made a PCB with 1 x ESP-12 and 10 x INA219 TI voltage and current and wrote the app software.
I am using a recent Arduino tool set for compiling the source code and loading firmware into the ESP-12.
Using the Adafruit WiFi and I2C libs and .h files.
On the I2C bus I have 10 x INA219, address range [AO-A1] linked from 0x40 to 0x49. All INA219 are running at 3.3V and sensing 5V and 1A max
99% of the code runs perfectly.
PROBLEM: The strangest thing is if I call the INA219 driver with address 0x48 I can see that channel voltage OK but the current is 0.0mA
Yet all the other 9 channels work perfectly and report their E&I OK.
The same problem occurs on 5 PCBs.
I can see 12mV on the actual shunt pins of the problem INA219 yet the software drivers report 0.0 mA.
Scoping with a 100 MHz digital scope the I2C bus show the current values in the actual I2C INA219 0x48 packet DO vary with load current.
But the returned I value is always 0.0mA
HELP!

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adafruit_support_mike
 
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Re: Multiple INA219 issue

Post by adafruit_support_mike »

Hmm.. I can't think of any reason for that in the INA219 library or underlying I2C code.

Try writing a sketch that just reads the INA219s and see if you get the same behavior. If so, post your code and I'll try to duplicate it on my own hardware.

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redmond
 
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Re: Multiple INA219 issue

Post by redmond »

Hello and thanks.
Tried replacing the IC and fitting bigger cap across shunt (has 10R each side of shunt as normal). No luck
Tried reducing the I2C clock to 75KHz . No Luck
Tried just that channel on its own. No Luck.
Here is the code.

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adafruit_support_mike
 
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Re: Multiple INA219 issue

Post by adafruit_support_mike »

Thanks. Also post a photo showing your hardware and connections please. 800x600 images usually work best.

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redmond
 
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Re: Multiple INA219 issue

Post by redmond »

Hello
All PCB designs for clients are done in Altium.
Happy to send the confidential hardware design details in PDF but to you only.
Do you have a drop box or equivalent?
All the best
Len

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redmond
 
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Re: Multiple INA219 issue

Post by redmond »

Hello
Problem 1: hardware
I have discovered by building a simple breadboard that the INA219 is a bit nasty. It is very //extremely sensitive to shunt voltage transients!
The one failing channel 1 out of 10 on my main PCB had its shunt track running on the bottom layer 4 under the chip. (OK my fault)
This IC latched up failed despite having a solid GND layer 2 and VCC layer 3 under the the INA219 which I thought would shield it enough, but NO.
Problem 2: software
The Adafruit INA219.cpp code has a comment that for such transients they reset the INA219 calibration for every GetPower() function call.
Sadly their code fix is not done in all GetCurrent related functions and I further noticed in my testing that it does not solve the problem in my simple breadboard.
The better solution is to call the setCalibration_32V_2A() (or whatever is used) function each time before any GetCurrent related call is made.
Now the INA219 current readings are correct and nearly bullet proof.
But of course a transient right in between the 2 set of calls ( say a 100 micosec window ) could still latch it up.
So a bit of multiple samples and throwing out at a singe zero current reading event will make it bullet proof.

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Re: Multiple INA219 issue

Post by adafruit_support_mike »

Glad to hear you found the issue. I’ll take a look at the INA219 library with an eye toward making it a bit more durable.
redmond wrote: The one failing channel 1 out of 10 on my main PCB had its shunt track running on the bottom layer 4 under the chip. (OK my fault)
It happens.. I remember hearing about a team that was getting low-gigahertz noise on some signal, in a design that didn’t have any clock that fast. eventually they took the read/write head from an old hard drive and used it as a precision EMF probe, and found the clock inside the package if an FPGA. That shouldn’t have made any difference because the back of the board under the FPGA was a ground plane.

With further probing, they found a couple of breaks in the ground plane that made ‘directly under the FPGA’s clock’ the shortest return path for the signal.

The moral, if there is one, is that physics will get you if it can. ;-)

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