pin mapping M4 Itsybitsy vs M4 Express

[Turbo_Transformer]

Hi - I have been running some code on an itsybitsy M4 to generate a PWM signal on pin D7 using TCC0 and pin D10 using TCC1. The code is something cobbled together from this very useful thread - https://forum.arduino.cc/t/metro-m4-exp ... ion/566491

So far, I had assumed that the digital pins on the Itsy-Bitsy are mapped identically to the M4 Express - well, they are not.

M4 Express D7 is connected to PB12, while M4 Itsybitsy's D7 is connected to PA15.
M4 Express D10 is connected to PB18, while M4 Itsybitsy's D10 is connected to PA20.

Yet - the following code works (meant for and M4 express) works on itsybitsy M4 as well. My goal is to generate TCC1 PWM on D5 instead of D10 to evaluate the 74HCT125 buffer connected to D5.

CODE -

// Set up the generic clock (GCLK7) to clock timer TCC1
GCLK->GENCTRL[7].reg = GCLK_GENCTRL_DIV(1) | // Divide the 48MHz clock source by divisor 1: 48MHz/1 = 48MHz
GCLK_GENCTRL_IDC | // Set the duty cycle to 50/50 HIGH/LOW
GCLK_GENCTRL_GENEN | // Enable GCLK7
// GCLK_GENCTRL_SRC_DFLL; // Select 48MHz DFLL clock source
GCLK_GENCTRL_SRC_DPLL1; // Select 100MHz DPLL clock source
// GCLK_GENCTRL_SRC_DPLL0; // Select 120MHz DPLL clock source
while (GCLK->SYNCBUSY.bit.GENCTRL7); // Wait for synchronization

GCLK->PCHCTRL[TCC1_GCLK_ID].reg = GCLK_PCHCTRL_BANNED | // Enable the TCC1 perhipheral channel
GCLK_PCHCTRL_GEN_GCLK7; // Connect generic clock 7 to TCC1

// Enable the peripheral multiplexer on pin D10

PORT->Group[g_APinDescription[10].ulPort].PINCFG[g_APinDescription[10].ulPin].bit.PMUXEN = 1;

// Set the D10 (PORT_PA18) peripheral multiplexer to peripheral (even port number) F(5): TCC1, Channel 2

PORT->Group[g_APinDescription[10].ulPort].PMUX[g_APinDescription[10].ulPin >> 1].reg |= PORT_PMUX_PMUXE(5);

TCC1->CTRLA.reg = TC_CTRLA_PRESCALER_DIV1 | // Set prescaler to 8, 48MHz/8 = 6MHz
TC_CTRLA_PRESCSYNC_PRESC; // Set the reset/reload to trigger on prescaler clock
//
// // TCC1->CTRLBSET.reg = TCC_CTRLBSET_ONESHOT; // Enable one shot
// // while (TCC1->SYNCBUSY.bit.CTRLB); // Wait for synchronization
//
TCC1->DRVCTRL.reg |= TCC_DRVCTRL_NRE2; // Continue to drive the output on TCC1/WO[2] when timer has stopped (rather than becoming tri-state)
// // TCC1->DRVCTRL.reg |= TCC_DRVCTRL_INVEN2; // Invert the output to generate an active low pulse on TCC1/WO[2]
//
TCC1->WAVE.reg = TC_WAVE_WAVEGEN_NPWM; // Set-up TCC1 timer for Normal (single slope) PWM mode (NPWM)
while (TCC1->SYNCBUSY.bit.WAVE) // Wait for synchronization

TCC1->PER.reg = 20000; // Set-up the PER (period) register for 1500us pulse period
while (TCC1->SYNCBUSY.bit.PER); // Wait for synchronization

TCC1->CC[0].reg = 1999; // Set-up the CC (counter compare), channel 2 register for 1500us pulse width
while (TCC1->SYNCBUSY.bit.CC0); // Wait for synchronization

NVIC_SetPriority(TCC1_0_IRQn, 0); // Set the Nested Vector Interrupt Controller (NVIC) priority for TCC1 to 0 (highest)
NVIC_EnableIRQ(TCC1_0_IRQn); // Connect the TCC1 timer to the Nested Vector Interrupt Controller (NVIC)
// TCC1->INTENSET.reg |= TCC_INTENSET_MC0; // match interrupt
TCC1->INTENSET.reg |= TCC_INTENSET_OVF; // overflow interrupt
TCC1->CTRLA.bit.ENABLE = 1; // Enable timer TCC1
while (TCC1->SYNCBUSY.bit.ENABLE); // Wait for synchronization